Methods2Business presents twice at CDNLive EMEA 2016 in Muenich and exhibits in Cadence IP booth

Posted by marleen on May 3, 2016

Monday May 2nd, 17:30 Automotive track

Xtensa®-based Wi-Fi HaLow™ MAC and Baseband subsystem for upcoming IEEE 802.11ah standard

Presenters: Dejan Đumić, Daniel Kesler

Abstract

This presentation will highlight the Aegis ultra-low power SoC solution for the recently announced Wi-Fi HaLow™ technology created for products incorporating the upcoming IEEE 802.11ah standard. The Aegis solution is a result of a joint collaboration between Methods2Business and Adapt-IP and is designed to achieve the lowest possible power and gate count for a low bit-rate client in a long range battery operated sensor network.

The ultra-low power IEEE802.11ah MAC and BB IP fully support all mandatory features as well as some optional ones like Target Wake Time (TWT) and Restricted Access Window (RAW) to further minimize power consumption and increase data throughput to realize a competitive SoC solution.

Realizing the ultra-low power requirements for this IP which is extremely complex in terms of hardware and software, could only be realized thanks to the powerful combination of SystemC-based high-level synthesis and virtual prototyping. Key to success also lies in the usage of the Xtensa® Fusion DSP core because it enables a more flexible and future proof solution.  The presentation will show how to build optimized TIE instructions using the Xtensa® Xplorer IDE to offload compute intensive AES and SHA functions for leveraging the same proven security benefits of traditional Wi-Fi.

By integrating the Upper MAC SW stack into the lightweight Xtensa® XOS, it becomes easier for customers to run the Wi-Fi application next to the Upper MAC SW stack on a single Xtensa® DSP core.

The MAC and BB IP will be demonstrated during the presentation on a virtual and FPGA-based platform by showing a challenging user application built on top of the integrated TCP/IP stack. 

 


Tuesday May 3rd, 14:30 System Design & Verification track

Exploiting SystemC-based design and Xtensa® DSP technology to build ULP Wi-Fi HaLow™ MAC & BB IP

Presenters: Marleen Boonen, Nemanja Kondić

Abstract

Realizing the first MAC and BB IPs for a new Wi-Fi technology, like Wi-Fi Halow™, is a complex task in particular, when it is the aim to enter the market quickly once the standard is released, with a competitive family of Wi-Fi Halow™ IP products to serve various segments of the Wi-Fi IP market going from battery operated sensor nodes to highly complex access points or relays.

To achieve these goals, you need forward-thinking design engineers who can turn a few thousand pages of IEEE 802.11ah specification into a well-defined hardware/software solution for a scalable and easy to customize IP product by taking advantage of latest EDA tools and innovative system-level design approaches.

This presentation will show that SystemC-based high-level synthesis can successfully be applied for building a heavily control dominated MAC IP as well as for implementing the complex mathematics of a data oriented digital baseband. In both cases, designers only model the desired IP functionality and automatically generate the optimal RTL implementation for a low power and low gate count solution.

This presentation will also show the huge benefits of having a virtual platform to develop the full MAC SW stack and validate its functionality in a Wi-Fi subsystem built with the Xtensa® Fusion DSP core and the SystemC models of the hardware IPs. While the virtual platform is ideal to validate software and hardware functionality, the Xtensa® Xplorer environment offers a cycle accurate processor model which is ideal for performance analysis and building dedicated TIE instructions for offloading power hungry or compute intensive software functions. To test the correct timing and performance of the full system once all hardware is realized in RTL, the full design system is ported on FPGA. Ultimately the FPGA’S are extended with the ULP radio chip to prove real Wi-Fi.